View BR34E02NUX-3_9100840.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

datashee t product structure silicon monolithic integrated circuit this product has no designed protec tion against radioactive rays 1/30 tsz02201-0r2r0g100520-1-2 31.may.2013 rev.003 ?2013 rohm co., ltd. all rights reserved. tsz22111 ? 14 ? 001 www.rohm.com serial eeprom series standard eeprom plug & play eeprom br34e02-3 general description br34e02-3 is 256 8 bit electrically erasable prom (based on serial presence detect) features ? 256 8 bit architecture serial eeprom ? wide operating voltage range: 1.7v to 5.5v ? two-wire serial interface ? self-timed erase and write cycle ? page write function (16byte) ? write protect mode ? settable reversible write protect function : 00h-7fh ? write protect 1 (onetime rom) : 00h-7fh ? write protect 2 (hardwire wp pin) : 00h-ffh ? low power consumption ? write (at 1.7v) : 0.4ma (typ) ? read (at 1.7v) : 0.1ma (typ) ? standby (at 1.7v) : 0.1a (typ) ? prevention of write mistake ? write protect feature (wp pin) ? prevention of write mistake at low voltage ? high reliability fine pattern cmos technology ? more than 1 million write cycles ? more than 40 years data retention ? noise reduction filtered inputs in scl / sda ? initial delivery state ffh packages w(typ) x d(typ) x h(max) br34e02-3 capacity bit format type power source voltage package 2kbit 256x8 br34e02fvt-3 1.7v to 5.5v tssop-b8 BR34E02NUX-3 vson008x2030 absolute maximum ratings (ta=25 ) parameter symbol rating unit remark supply voltage v cc -0.3 to +6.5 v power dissipation pd 330 (tssop-b8) mw derate by 3.3mw/ c when operating above ta=25 c 300 (vson008x2030) derate by 3.0mw/ c when operating above ta=25 c storage temperature tstg -65 to +125 operating temperature topr -40 to +85 input voltage / output voltage (a0) - -0.3 to 10.0 v input voltage / output voltage (others) - -0.3 to v cc +1.0 v electrostatic discharge voltage (human body model) v esd -4000 to +4000 v memory cell characteristics (ta=25 , v cc =1.7v to 5.5v) parameter limit unit min typ max write / erase cycle (1) 1,000,000 - - times data retention (1) 40 - - years (1) not 100% tested tssop-b8 3.00mm x 6.40mm x 1.20mm v son008x2030 2.00mm x 3.00mm x 0.60mm downloaded from: http:///
datasheet datasheet 2/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 recommended operating ratings parameter symbol rating unit supply voltage v cc 1.7 to 5.5 v input voltage v in 0 to v cc v dc characteristics (unless otherwise specified ta=-40 to +85 , v cc =1.7v to 5.5v) parameter symbol limit unit test conditions min typ max input high voltage v ih 0.7 v cc - vcc+1.0 v input low voltage v il -0.3 - 0.3 v cc v output low voltage 1 v ol1 - - 0.4 v i ol =2.1ma, 2.5v v cc 5.5v(sda) output low voltage 2 v ol2 - - 0.2 v i ol =0.7ma, 1.7v v cc 2.5v(sda) input leakage current 1 i li1 -1 - 1 a v in =0v to v cc (a0, a1, a2, scl) input leakage current 2 i li2 -1 - 15 a v in =0v to v cc (wp) input leakage current 3 i li3 -1 - 20 a v in =v hv (a0) output leakage current i lo -1 - 1 a v out =0v to v cc supply current (write) i cc1 - - 2.0 ma v cc =5.5v, f scl =400khz, t wr =5ms byte write page write write protect supply current (read) i cc2 - - 0.5 ma v cc =5.5v, f scl =400khz random read current read sequential read standby current i sb - - 2.0 a v cc =5.5v, sda, scl= v cc a0, a1, a2=gnd, wp=gnd a0 hv voltage v hv 7 - 10 v v hv -v cc 4.8v ac characteristics (unless otherwise specified ta=-40 to +85 , v cc =1.7v to 5.5v) parameter symbol limit unit min typ max clock frequency f scl - - 400 khz data clock high period t high 0.6 - - s data clock low period t low 1.2 - - s sda and scl rise time ( 1) t r - - 0.3 s sda and scl fall time (1) t f - - 0.3 s start condition hold time t hd:sta 0.6 - - s start condition setup time t su:sta 0.6 - - s input data hold time t hd:dat 0 - - ns input data setup time t su:dat 100 - - ns output data delay time t pd 0.1 - 0.9 s output data hold time t dh 0.1 - - s stop condition setup time t su:sto 0.6 - - s bus free time t buf 1.2 - - s write cycle time t wr - - 5 ms noise spike width (sda and scl) t i - - 0.1 s wp hold time t hd:wp 0 - - s wp setup time t su:wp 0.1 - - s wp high period t high:wp 1.0 - - s (1) not 100% tested downloaded from: http:///
datasheet datasheet 3/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 0 figure 1-(a). serial input / output timing figure 1-(b). start/stop bit timing sda data is latched into the chip at the rising edge of scl clock. output data toggles at the falling edge of scl clock. fi g ure 1- ( d ) .wp timin g of the write o p eration figure 1-(e). wp timing of the write cancel operation for write operation, wp must be "low" from the rising edge of the clock (which takes in d0 of first byte) until the end of t wr . (see figure 1-(d) ) during this period, write operation can be canceled by setting wp "high". see figure 1-(e) when wp is set to "high" during t wr , write operation is immediately ceased, making the data unreliable. it must then be re-written. : : : : : : figure 1-(c). write cycle timing serial input / output timing t wr t high : wp data(n) data(1) d1 ack ack d0 sda scl wp t wr data(n) d1 ack d0 stop condition sda thd wp ack data(1) t su wp scl wp downloaded from: http:///
datasheet datasheet 4/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 block diagram pin configuration pin descriptions pin name input/out put descriptions vcc - power supply gnd - ground 0v a0, a1, a2 in slave address set (1) scl in serial clock input sda in / out slave and word address (2) serial data input, serial data output wp in write protect input (3) (1) a0, a1 and a2 are not allowed to use as open. (2) open drain output requires a pull-up resistor. (3) wp pin has a pull-down resistor. please leav e unconnected or connect to gnd when not in use. (top view) 8 7 6 5 1 2 3 4 vcc wp scl sda a 0 a 1 a 2 gnd br34e02-3 8 7 6 5 4 3 2 1 sda scl wp v cc gnd a2 a1 a0 address decoder slave , word address data registe contorol logic high voltage v cc level detect 8bit 8bit 8bit ack start stop protect_memory_array 2kbit_memory_array vcc downloaded from: http:///
datasheet datasheet 5/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 figure 4. output low voltage1 vs output low current (vcc=2.5v) figure 5. output low voltage2 vs output lo w current (vcc=1.7v) figure 2. input high voltage vs supply voltage (a0, a1, a2, scl, sda, wp) figure 3. input low voltage vs supply voltage (a0, a1, a2, scl, sda, wp) typical performance curves output low voltage1: v ol1 (v) out p ut low current: i ol ( ma ) output low voltage2: v ol2 (v) out p ut low current: i ol ( ma ) vih ( v ) input high voltage: v ih (v) supply voltage : v cc (v) vil ( v ) input low voltage: v il (v) supply voltage : v cc (v) downloaded from: http:///
datasheet datasheet 6/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 figure 9. supply current (write) vs supply voltage (f scl =400khz) figure 8. output leakage current vs supply voltage (sda) figure 6. input leakage current1 vs supply voltage (a0, a1, a2, scl) figure 7. input leakage current2 vs supply voltage (wp) typical performance curves \ continued ili1 ( ua ) input lea k age current1 : i li 1 ( ua ) supply voltage : v cc (v) input leakage current1: i li1 (a) input lea k age current2 : i li2 ( ua ) supply voltage : vcc ( v ) supply voltage : v cc (v) input leakage current2: i li2 (a) output lea k age current: i l o ( ua ) supply voltage : v cc (v) output leakage current: i lo (a) supply current ( write ) : icc1 ( ma ) supply voltage : v cc (v) supply current (write): i cc1 (ma) downloaded from: http:///
datasheet datasheet 7/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 figure 12. clock frequency vs supply voltage figure 13. data clock high period vs supply voltage figure 10. suppl y current (read) vs supply voltage (f scl =400khz) figure 11. standby current vs supply voltage typical performance curves \ continued supply current ( read ) : icc2 ( ma ) supply current (read): i cc2 (ma) supply voltage : v cc (v) supply voltage : v cc (v) standby current: i sb (a) supply voltage : v cc (v) clock frequency: f scl (khz) data clk h time : t high (us) supply voltage : v cc (v) data clock high period: t high (s) downloaded from: http:///
datasheet datasheet 8/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 figure 16. start condition setup time vs supply voltage figure 17. input data hold time vs supply voltage (high) typical performance curves \ continued start condition set up time : t su:sta (us) input data hold time : t hd:dat ( ns ) figure 14. data clock low period vs supply voltage figure 15. start condition hold time vs supply voltage supply voltage : v cc (v) data clock low period: t low (s) supply voltage : v cc (v) start condition hold time: t hd:sta (s) supply voltage : v cc (v) start condition setup time : t su :sta ( s ) supply voltage : v cc (v) input data hold time: t hd:dat (ns) downloaded from: http:///
datasheet datasheet 9/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 figure 18. input data hold time vs supply voltage (low) figure 19. input data setup time vs supply voltage (high) figure 20. input data setup time vs supply voltage (low) figure 21. low output data delay time vs supply voltage typical performance curves \ continued supply voltage : v cc (v) input data setup time: t su:dat (ns) supply voltage : v cc (v) input data hold time: t hd:dat (ns) supply voltage : v cc (v) input data setup time: t su:dat (ns) supply voltage : v cc (v) low output data delay time: t pd (s) downloaded from: http:///
datasheet datasheet 10/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 figure 24. bus free time vs supply voltage figure 25. write cycle time vs supply voltage figure 22. high output da t a delay time vs supply voltage figure 23. stop condition setup time vs supply voltage typical performance curves \ continued stop condition setup time : t su:sto ( us ) supply voltage : v cc (v) high output data delay time: t pd (s) supply voltage : v cc (v) stop condition setup time: t su:sto (s) supply voltage : v cc (v) bus free time: t buf (s) supply voltage : v cc (v) write cycle time: t wr (ms) downloaded from: http:///
datasheet datasheet 11/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 figure 28. noise spike width vs supply voltage (sda h) figure 29. noise spike width vs supply voltage (sda l) figure 26. noise spike width vs supply voltage (scl h) figure 27. noise spike width vs supply voltage (scl l) typical performance curves \ continued supply voltage : v cc (v) noise spike width(scl h): t l (s) supply voltage : v cc (v) noise spike width(scl l): t l (s) supply voltage : v cc (v) noise spike width(sda h): t l (s) noise reduction effective time : t l (sd a l)(us) supply voltage : v cc (v) noise spike width(sda l): t l (s) downloaded from: http:///
datasheet datasheet 12/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 figure 30. wp hold time vs supply voltage figure 31. wp setup time vs supply voltage figure 32. wp high period vs supply voltage typical performance curves \ continued supply voltage : v cc (v) wp hold time: t hd:wp (s) wp setup time : t su:wp (us) supply voltage : v cc (v) wp setup time: t su:wp (s) supply voltage : v cc (v) wp high period: t high:wp (s) downloaded from: http:///
datasheet datasheet 13/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 timing chart 1. i 2 c bus data communication i 2 c bus data communication starts by start condition input, and e nds by stop condition input. data is always 8bit long, and acknowledge is always required after each byte. i 2 c bus data communication with several devices is possible by connecting with 2 communication lines: serial data (sda) and serial clock (scl). among the devices, there should be a master that generates clock and c ontrol communication start and end. the rest become slave which are controlled by an address pecu liar to each device, like th is eeprom. the device that outputs data to the bus during data communication is called transmitter, and the device that receiv es data is called receiver. 2. start condition (start bit recognition) (1) before executing each command, start condition (start bit) where sda goes from 'high' down to 'low' when scl is high' is necessary. (2) this ic always detects whether sda and scl are in start condition (start bit) or not, therefore, unless this condition is satisfied, any command cannot be executed. 3. stop condition (stop bit recognition) (1) each command can be ended by a stop condition (stop bi t) where sda goes from 'low' to 'high' while scl is 'high'. (see figure 1-(b) start/stop bit timing) 4. write protect by soft ware (1) set write protect command and permanent set write pr otect command set data of 00h to 7fh in 256 words write protection block. clear write protect command can cancel write protection blo ck which is set by set write protect command. cancel of write protection block which is set by permanent set write protect command at once is impossibility. when these commands are carried out, wp pin must be open or gnd. 5. acknowledge (1) acknowledge is a software used to indicate successful data transfers. the transmitter device will release the bus after transmitting eight bits. when inputting the slave address during write or read operation, the transmitter is the -com. when outputting the data during read operation, the transmitter is the eeprom. (2) during the ninth clock cycle the receiver will pull the sd a line low to verify that the eight bits of data have been received. (when inputting the slave address during write or read operation, eeprom is the receiver. when outputting the data during read operat ion the receiver is the -com.) (3) the device will respond with an acknowledge after recognition of a start condition and its slave address (8bit). (4) in write mode, the device will respond with an acknowledge after the receipt of each subsequent 8-bit word (word address and write data). (5) in read mode, the device will transmi t eight bits of data, release the sda line, and monitor the line for an acknowledge. (6) if an acknowledge is detected and no stop condition is gener ated by the master, the device will continue to transmit the data. if an acknowledge is not detec ted, the device will terminate further data transmissions and await a stop condition before returning to standby mode. 6. device addressing following a start condition, the master outputs the slave address to be accessed. the most significant four bits of the slave address are the device type indentifier. for this eeprom it is 1010. (for wp register access this code is "0110".) the next three bits identify the specif ied device on the bus (device address). the device address is defined by the state of the a0 ,a1 and a2 input pins. this ic works only when the device address input from the sda pin corresponds to the status of the a0,a1 and a2 input pins. using this address scheme allows up to eight devices to be connected to the bus. the last bit of the stream (r/w read/write) determines the operation to be performed. r/w=0 ???? write (including word address input of random read) r/w=1 ???? read downloaded from: http:///
datasheet datasheet 14/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 slave address set pin device type device address read write mode access area a2 a1 a0 1010 a2 a1 a0 w/r 2kbit access to memory a2 a1 a0 0110 a2 a1 a0 w/r access to permanent set write protect memory gnd gnd vhv 0 0 1 w/r access to set write protect memroy gnd vcc vhv 0 1 1 w/r access to clear write protect memory 7. write protect pin (wp) when wp pin set to vcc (h level), write protect is set for 256 words (all address). when wp pin set to gnd (l level), it is enable to write 256 words (all address). if permanent protection is done by write protect command, lo wer half area (00 to 7fh address) is inhibited writing regardless of wp pin state. wp pin has a pull-down resistor. please be left unconnect ed or connect to gnd when wp feature is not in use. 8. confirm write protect resistor by ack according to state of write prot ect resistor, ack is as follows. state of write protect register wp input input command ack address ack data ack write cycle(t wr ) in case, protect by pswp - pswp,swp,cwp no ack - no ack - no ack no page or byte write (00 to 7fh) ack wa7 to wa0 ack d7 to d0 no ack no in case,protect by swp 0 swp no ack - no ack - no ack no cwp ack - ack - ack yes pswp ack - ack - ack yes page or byte write (00 to 7fh) ack wa7 to wa0 ack d7 to d0 no ack no 1 swp no ack - no ack - no ack no csp ack - ack - no ack no pswp ack - ack - no ack no page or byte write ack wa7 to wa0 ack d7 to d0 no ack no in case, not protect 0 pswp, swp, cwp ack - ack - ack yes page or byte write ack wa7 to wa0 ack d7 to d0 ack yes 1 pswp, swp, cwp ack - ack - no ack no page or byte write ack wa7 to wa0 ack d7 to d0 no ack no acknowledge when writing data or defin ing the write-protection (instructions with r/w bit=0) - is dont care state of write protect register command ack address ack data ack in case, protect by pswp pswp, swp, cwp no ack - no ack - no ack in case, protect by swp swp no ack - no ack - no ack cwp ack - no ack - no ack pswp ack - no ack - no ack case, not protect pswp, swp, cwp ack - no ack - no ack acknowledge when reading data the write-prot ection (instructions with r/w bit=1) downloaded from: http:///
datasheet datasheet 15/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 command 1. write cycle during write cycle operation data is written in the eeprom . the byte write cycle is used to write only one byte. in the case of writing continuous data consisting of more than one byte, page write is used. the maximum bytes that can be written at one time is 16 bytes. (1) with this command the data is programmed into the indicated word address. (2) when the master generates a stop condition, the device b egins the internal write cycle to the nonvolatile memory array. (3) once programming is started no commands are accepted for t wr (5ms max). (4) this device is capable of 16-byte page write operations. (5) if the master transmits more than 16 words prior to gener ating the stop condition, the address counter will roll over and the previously transmitted data will be overwritten. when two or more byte of data are input, the four low order address bits are internally incremented by one after th e receipt of each word, while the four higher order bits of the address (wa7 to wa4) remain constant. w r i t e s t a r t r / w a c k s t o p word address(n) data(n) sda line a c k a c k data(n+15) a c k slave address 1 0 0 1a 0 a1 a2 wa 7 d0 d7 d0 wa 0 a1 a2 wa 7 d7 11 00 w r i t e s t a r t r / w s t o p word address dat a slave address a0 wa 0 d0 a c k sda line a c k a c k figure 33. byte write cycle timing figure 34. page write cycle timing downloaded from: http:///
datasheet datasheet 16/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 2. read cycle during read cycle operation data is read from the eepr om. the read cycle is composed of random read cycle and current read cycle. the random read cycle reads the data in the indicated address. the current read cycle reads the data in the internally i ndicated address and verifies the data immediately after the write operation. the sequential read operation can be performed with both current read and random read. with the sequential read cycle it is possible to continuously read the next data. (1) random read operation allows the master to acce ss any memory location indicated by word address. (2) in cases where the previous operation is random or cu rrent read (which includes sequential read), the internal address counter is increased by one from the last acce ssed address (n). thus current read outputs the data of the next word address (n+1). (3) if an acknowledge is detected and no stop condition is generated by the master (-com), the device will continue to transmit data. (it can transmit all data (2kbit 256word)) (4) if an acknowledge is not detected, the device will terminat e further data transmissions and await a stop condition before returning to standby mode. (5) if an acknowledge is detected with the "low" level (not "high" level), the command will become sequential read, and the next data will be transmitted. therefore, the read command is not termi nated. in order to terminate read input acknowledge with "high" always, then input a stop condition. it is necessary to input high at last ack timing. a1 a2 d7 11 00 r ea d st a rt r / w s t o p dat a sda line slave address a0 d0 a c k a c k figure 36. current read cycle timing it is necessary to input high at last ack timing. figure 35. random read cycle timing w r i t e s t a r t r / w a c k s t o p word address(n) sda line a c k a c k data(n) a c k slave address 10 0 1a 0 a1 a2 wa 7 a0 d0 slave address 10 0 1a 1 a2 s t a r t d7 r / w r ea d wa 0 figure 37. sequential read cycle timing with current read r ea d s t a r t r / w a c k s t o p data(n) sda line a c k a c k data(n+x) a c k slave address 10 0 1a 0 a1 a2 d0 d7 d0 d7 it is necessary to input high at last ack timing. downloaded from: http:///
datasheet datasheet 17/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 3. write protect cycle (1) permanent set write protect cycle (a) permanent set write protect command set data of 00h to 7fh in 256 words write protection block. cancel of write protection block which is set by permanent se t write protect command at once is impossibility. when these commands are carried out, wp pin must be open or gnd. (b) permanent set write protect command needs t wr from stop condition same as byte write and page write, during t wr , input command is canceled. (c) refer to page14 about reply of ack in each protect state. (2) set write protect cycle (a) set write protect command set data of 00h to 7fh in 256 words write protection block. clear write protect command can cancel write protection block which is set by set write protect command. when these commands are carried out, wp pin must be open or gnd. (b) set write protect command needs t wr from stop condition same as byte write and page write, during t wr , input command is canceled. (c) refer to page14 about reply of ack in each protect state. w r i t e s t a r t r / w a c k s t o p word address sda line a c k data a c k slave address 1 0 0 1a 0 a1 a2 * * * * wp *:dont care figure 38. permanent set write protect cycle w r i t e s t a r t r / w a c k s t o p word address sda line a c k data a c k slave address 1 00 11 0 0 * * * * wp *:dont care figure 39. set write protect cycle downloaded from: http:///
datasheet datasheet 18/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 (3) clear write protect cycle (a) clear write protect command can cancel write protection block which is set by set write protect command. when these commands are carried out, wp pin must be open or gnd. (b) clear write protect command needs t wr from stop condition same as by te write and page write, during t wr , input command is canceled. (c) refer to page14 about reply of ack in each protect state. software reset software reset is executed to avoid malfunction after power on and during command input. software reset has several kinds and 3 kinds of them are shown in t he figure below. (refer to figure 41.-(a), figure 41.-(b), and figure 41.-(c).) within the dummy clock input area, the sda bus is released ('h' by pull up) and ack output and read data '0' (both 'l' level) may be output from eeprom. therefore, if 'h' is input forcibly , output may conflict and over current may flow, leading to instantaneous power failure of system power source or influence upon devices. w r i t e s t a r t r / w a c k s t o p word address sda line a c k data a c k slave address 1 00 11 1 0 * * * * wp *:dont care figure 40. clear write protect cycle * command starts with start condition. figure 41-(a). dummy clock x 14 + start + start figure 41-(c). start x 9 figure 41-(b). start + dummy clock x 9 + start command 1 2 13 14 scl sd dummy clock x 14 start x 2 command sda command scl sd 2 1 8 9 dummy clock x 9 start start command sda scl sd 1 2 3 8 9 7 command command start x 9 sda downloaded from: http:///
datasheet datasheet 19/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 acknowledge polling during internal write execution, all in put commands are ignored, therefore ack is not returned. during internal automatic write execution after write cycle input, next command (slave addr ess) is sent. if the first ack signal sends back 'l', then it means end of write operation, else 'h' is returned, which m eans writing is still in progress. by the use of acknowledge polling, next command can be executed without waiting for t wr = 5ms. to write continuously, w/r = 0, then to carry out current read cycle after write, slave address with w/r = 1 is sent. if ack signal sends back 'l', and then execute word address input and data output and so forth. wp effective timing wp is usually fixed to 'h' or 'l', but when wp is used to canc el write cycle and so on, observe the following wp valid timing. during write cycle execution, inside cancel valid area, by setting wp='h', write cycle can be cancelled. in both byte write cycle and page write cycle, the area from the first start condition of command to the rise of clock to take in d0 of data(in page write cycle, the first byte data) is the cancel invalid area. wp input in this area becomes don't care. the area from the rise of scl to take in d0 to the stop condition input is the cancel valid area. furthermore, after the execution of forced end by wp, the ic enters standby status.. figure 43. wp effective timing figure 42. case of continuous write by acknowledge polling wp cancellation invalid period no data will be written ? the rising edge of the clock which take in d0 scl d0 a ck a n enlargement scl sda an enlargement a ck d0 the rising edge of sda sda wp wp cancellation effective period data is not guaranteed stop of the write operation slave address d7 d6 d5 d4 d3 d2 d1 d0 data t wr sda d1 s t a r t a c k l a c k l a c k l a c k l s t o p word address after completion of internal write, ack=low is returned, so input next word address and data in succession. during internal write, ack = high is returned. the first write command t wr the second write command t wr downloaded from: http:///
datasheet datasheet 20/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 figure 45. i/o circuit command cancellation from the start and stop conditions during command input, by continuously inputting start conditi on and stop condition, command can be cancelled. (figure 44.) however, within ack output area and during data read, sda bus may output 'l'. in this case, start condition and stop condition cannot be input, so reset is not available. theref ore, execute software reset. when command is cancelled by start-stop condition during random read cycle, sequential read cycle, or current read cycle, internal setting address is not determined. therefore, it is not possible to carry out current read cycle in succession. to carry out read cycle in succession, carry out random read cycle. i/o peripheral circuit 1. pull-up resistance of sda terminal sda is nmos open drain, so it requires a pull up resistor. as for this resistance value (r pu ), select an appropriate value from microcontroller v il , i l , and v ol -i ol characteristics of this ic. if r pu is large, operating frequency is limited. the smaller the r pu , the larger is the supply current (read). 2. maximum r pu the maximum value of r pu is determined by the following factors. (1) sda rise time to be determined by the capacitance (c bus ) of bus line and r pu of sda should be t r or lower. furthermore, ac timing shou ld be satisfied even when sda rise time is slow. (2) the bus. electric potential a to be determined by the input current leak total (i l ) of device connected to bus at output of 'h' to the sda line and r pu should sufficiently secure the input 'h' level (v ih ) of microcontroller and eeprom including recommended noise margin of 0.2vcc. v cc -i l r pu -0.2 v cc v ih r pu 0.8v cc -v ih i l examples: when v cc =3v, i l =10a, v ih =0.7 v cc according to (2) figure 44. command cancellation by the start and stop conditions during input of the slave address scl sda 1 1 0 0 start condition stop condition 300 [k ? ] r pu 0.83-0.73 1010 -6 r pu a br34e02 sda pin i l i l microcontroller the capacitance of bus line (c bus ) downloaded from: http:///
datasheet datasheet 21/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 l output of eeprom h output of microcontroller figure 47. input/output collision timing micro controller 3. minimum r pu the minimum value of r pu is determined by following factors. (1) meets the condition that v olmax =0.4v, i olmax =3ma when the output is low. (2) v olmax =0.4v must be lower than the input low level of the micro controller and the eeprom including the recommended noise margin of 0.1v cc . v olmax v il -0.1 v cc examples: v cc =3v, v ol =0.4v, i ol =3ma, the v il of the micro controller and the eeprom is v il =0.3v cc , and v ol =0.4 [v] and v il =0.3 3 =0.9 [v] so that condition (2) is met 4. pull-up resistance of scl terminal when scl control is made at the cmos out put port, there is no need for a pull up resistor. but when there is a time where scl becomes 'hi-z', add a pull up resistor. as fo r the pull up resistor value, one of several k ? to several ten k ? is recommended in consideration of drive per formance of output port of microcontroller. a0, a1, a2, wp pin connections 1. device address pin (a0, a1, a2) connections the status of the device address pins is compared with the device address sent by the master. one of the devices that are connected to the identical bus is selected. pull up or down t hese pins or connect them to v cc or gnd. pins that are not used as device address (n.c.pins) may be high, low, or hi-z. 2. wp pin connection the wp input allows or prohibits write operations. when wp is high, only read is available and write to all address is prohibited. both read and write are available when wp is low. in the event that the device is used as a rom, it is recommended that the wp input be pulled up or connected to v cc . when both read and write are operated, the wp input must be pulled down or connected to gnd or controlled. microcontroller connection 1. r s in i 2 c bus, it is recommended that sda port is of open drain input/output. howeve r, when using cmos input / output of tri state to sda port, insert a series resistance r s between the pull up resistor rpu and the sda terminal of eeprom. this is to control over curr ent that may occur when pmos of t he microcontroller and nmos of eeprom are turned on simultaneously. r s also plays the role of protecting the sd a terminal against surge. therefore, even when sda port is open drain input/output, r s can be used. 867 [ ? ] r pu 3-0.4 310 3 according to (1) v cc -v ol r pu i ol r pu v cc -v ol i ol r pu r s eeprom figure 46. i/o circuit a ck the h output of micro controller and the l output of eeprom may cause current overload to sda line. scl sda downloaded from: http:///
datasheet datasheet 22/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 2. maximum value of r s the maximum value of r s is determined by the following relations. (1) sda rise time to be determined by the capacitance (c bus ) of bus line and r pu of sda should be t r or lower. furthermore, ac timing shou ld be satisfied even when sda rise time is slow. (2) the bus electric potential a to be determined by r pu and r s the moment when eeprom outputs 'l' to sda bus should sufficiently secure the input 'l' level (v il ) of microcontroller including recommended noise margin of 0.1vcc. 3. minimum value of r s the minimum value of r s is determined by over current at bus collision. when over current flows, noises in power source line and instantaneous power failure of power source may o ccur. when allowable over current is defined as i, the following relation must be satisfied. determine the allowable current in consideration of t he impedance of power source line in set and so forth. set the over current to eeprom at 10ma or lower. r pu micro controller r s eeprom i ol a bus capa ci ta nce v ol v cc v il figure 48. i/o circuit figure 49. i/o circuit (v cc -v ol )r s +v ol +0.1v cc v il r s examples: when v cc =3v, v il =0.3v cc, v ol =0.4v, r pu =20 k r s 2010 3 1.67[k ? ] r pu +r s a ccordin g r pu v il -v ol -0.1v cc 1.1v cc -v il 1.13-0.33 0.33-0.4-0.13 vcc r s vcc i 300 [ ? ] r s 3 1010 -3 examples: when v cc =3v, i=10ma i r s micro controller eeprom "l" output "h" output maximum current downloaded from: http:///
datasheet datasheet 23/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 i/o equivalence circuit 1. input (a0,a1,a2,scl) 2. input (sda) 3. input (wp) figure 50. input pin circuit diagram figure 52. input pin circuit diagram figure 51. input pin circuit diagram downloaded from: http:///
datasheet datasheet 24/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 power-up/down conditions at power on, the ics internal circuits may go through unstabl e low voltage area as the vcc rises, making the ics internal logic circuit not completely reset, hence, malfunction may occu r. to prevent this, the ic is equipped with por circuit and lvcc circuit. to assure the operation, obser ve the following conditions at power on. 1. "sda='h'" and "scl='l' or 'h'". 2. follow the recommended conditions of t r , t off , v bot so that p.o.r. will be ac tivated during power up. t off t r v bot 0 figure 53. v cc rising wavefrom v cc t r t off v bot below 10ms above 10ms below 0.3v below 100ms above 10ms below 0.2v ii 3. set sda and scl so as not to become "hi-z". when the above conditions 1 and 2 cannot be observed, take following countermeasures. (1) in the case when the above condition 1 cannot be observed such that sda becomes l at power on. control scl and sda as shown below, to make scl and sda, h and h. t low t su:dat t dh a fter vcc becomes stabl e scl v cc sda figure 54. scl="h" and sda="l" t su:dat a fter vcc becomes stabl e figure 55. scl="l" and sda="l" (2) in the case when the above condition 2 cannot be observed. after the power source become stable, execute software reset.(figure 41) (3) in the case when the above condition 1 and 2 cannot be observed. carry out (1), and then carry out (2). low voltage malfunction prevention function lvcc circuit prevents data rewrite operation at low power, and prevents write error. at lvcc voltage (typ =1.2v) or below, data rewrite is prevented. noise countermeasures 1. bypass capacitor when noise or surge gets in the power source line, malfunct ion may occur, therefore, it is recommended to connect a bypass capacitor (0.1f) between ic vcc and gnd pins. connect t he capacitor as close to ic as possible. in addition, it is also recommended to connect a bypass capacitor between boards vcc and gnd. figure 53. vcc rising waveform downloaded from: http:///
datasheet datasheet 25/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 operational notes 1. described numeric values and data are design represent ative values only, and the va lues are not guaranteed. 2. we believe that the application circuit examples in this document are recommendable. howe ver, in actual use, confirm characteristics further sufficiently. if changing the fixed num ber of external parts is desired, make your decision with sufficient margin in consideration of st atic characteristics, transient characteri stics, and fluctuations of external parts and our lsi. 3. absolute maximum ratings if the absolute maximum ratings such as supply voltage, operating temperature range, and so on are exceeded, lsi may be destroyed. do not supply voltage or subject the ic to temperatures exceeding the absolute maximum ratings. in the case of fear of exceeding the absolute maximum rati ngs, take physical safety countermeasures such as adding fuses, and see to it that conditions exceeding the absol ute maximum ratings should not be supplied to the lsi. 4. gnd electric potential set the voltage of gnd terminal lowest at any operating condition. make sure that each terminal voltage is not lower than that of gnd terminal. 5. thermal design use a thermal design that allows for a suff icient margin by taking into account t he permissible power dissipation (pd) in actual operating conditions. 6. short between pins and mounting errors be careful when mounting the ic on printed circuit boards . the ic may be damaged if it is mounted in a wrong orientation or if pins are shorted toget her. short circuit may be caused by conductive particles caught between the pins. 7. operating the ic in the pr esence of strong electromagnetic field may ca use malfunction, ther efore, evaluate design sufficiently. downloaded from: http:///
datasheet datasheet 26/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 part numbering b r 3 4 e 0 2 x x x - 3 x x bus type 34 : i 2 c operating temperature -40 to+85 capacity 02=2k package fvt :tssop-b8 nux :vson008x2030 process packaging and formi ng specification e2 : embossed tape and reel (tssop-b8) tr : embossed tape and reel (vson008x2030) downloaded from: http:///
datasheet datasheet 27/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 physical dimension tape and reel information direction of feed reel ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tapequantity direction of feed the direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 3000pcs e2 () 1pin (unit : mm) tssop-b8 0.08 s 0.08 m 4 4 234 8765 1 1.0 0.05 1pin mark 0.525 0.245 +0.05 0.04 0.65 0.145 +0.05 0.03 0.1 0.05 1.2max 3.0 0.1 4.4 0.1 6.4 0.2 0.5 0.15 1.0 0.2 (max 3.35 include burr) s tssop-b8 downloaded from: http:///
datasheet datasheet 28/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 physical dimension tape and reel information \ continued ? order quantity needs to be multiple of the minimum quantity. embossed carrier tape tapequantity direction of feed the direction is the 1pin of product is at the upper right when you hold reel on the left hand and you pull out the tape on the right hand 4000pcs tr () direction of feed reel 1pin (unit : mm) vson008x2030 5 1 8 4 1.4 0.1 0.25 1.5 0.1 0.5 0.3 0.1 0.25 +0.05 0.04 c0.25 0.6max (0.12) 0.02 +0.03 0.02 3.0 0.1 2.0 0.1 1pin mark 0.08 s s vson008x2030 downloaded from: http:///
datasheet datasheet 29/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 marking diagrams vson008x2030 (top view) 23 part number marking lot number 1pin mark 3e0 tssop-b8 (top view) 3e023 part number marking lot numbe r 1pin mark downloaded from: http:///
datasheet datasheet 30/30 tsz02201-0r2r0g100520-1-2 ? 2013 rohm co., ltd. all rights reserved. 31.may.2013 rev.003 www.rohm.com tsz22111 ? 15 ? 001 br34e02-3 revision history date revision changes 07.sep.2012 001 new release 25.feb.2013 002 update some english words, sentences descriptions, grammar and formatting. 31.may.2013 003 p1 change format of package line-up table. add vesd in absolute maximum ratings p.4 add directions in pin descriptions downloaded from: http:///
datasheet d a t a s h e e t notice - ge rev.002 ? 2014 rohm co., ltd. all rights reserved. notice precaution on using rohm products 1. our products are designed and manufac tured for application in ordinary elec tronic equipments (such as av equipment, oa equipment, telecommunication equipment, home electroni c appliances, amusement equipment, etc.). if you intend to use our products in devices requiring ex tremely high reliability (such as medical equipment (note 1) , transport equipment, traffic equipment, aircraft/spacecra ft, nuclear power controllers, fuel c ontrollers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property (specific applications), please consult with the rohm sale s representative in advance. unless otherwise agreed in writing by rohm in advance, rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ro hms products for specific applications. (note1) medical equipment classification of the specific applications japan usa eu china class class class b class class class 2. rohm designs and manufactures its products subject to strict quality control system. however, semiconductor products can fail or malfunction at a certain rate. please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe desi gn against the physical injury, damage to any property, which a failure or malfunction of our products may cause. the following are examples of safety measures: [a] installation of protection circuits or other protective devices to improve system safety [b] installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. our products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditio ns, as exemplified below. accordin gly, rohm shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of an y rohms products under any special or extraordinary environments or conditions. if you intend to use our products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] use of our products in any types of liquid, incl uding water, oils, chemicals, and organic solvents [b] use of our products outdoors or in places where the products are exposed to direct sunlight or dust [c] use of our products in places where the products ar e exposed to sea wind or corrosive gases, including cl 2 , h 2 s, nh 3 , so 2 , and no 2 [d] use of our products in places where the products are exposed to static electricity or electromagnetic waves [e] use of our products in proximity to heat-producing components, plastic cords, or other flammable items [f] sealing or coating our products with resin or other coating materials [g] use of our products without cleaning residue of flux (ev en if you use no-clean type fluxes, cleaning residue of flux is recommended); or washing our products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] use of the products in places subject to dew condensation 4. the products are not subjec t to radiation-proof design. 5. please verify and confirm characteristics of the final or mounted products in using the products. 6. in particular, if a transient load (a large amount of load applied in a short per iod of time, such as pulse. is applied, confirmation of performance characteristics after on-boar d mounting is strongly recomm ended. avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading c ondition may negatively affect product performance and reliability. 7. de-rate power dissipation (pd) depending on ambient temper ature (ta). when used in seal ed area, confirm the actual ambient temperature. 8. confirm that operation temperat ure is within the specified range described in the product specification. 9. rohm shall not be in any way responsible or liable for fa ilure induced under deviant condi tion from what is defined in this document. precaution for mounting / circuit board design 1. when a highly active halogenous (chlori ne, bromine, etc.) flux is used, the resi due of flux may negatively affect product performance and reliability. 2. in principle, the reflow soldering method must be used; if flow soldering met hod is preferred, please consult with the rohm representative in advance. for details, please refer to rohm mounting specification downloaded from: http:///
datasheet d a t a s h e e t notice - ge rev.002 ? 2014 rohm co., ltd. all rights reserved. precautions regarding application examples and external circuits 1. if change is made to the constant of an external circuit, pl ease allow a sufficient margin considering variations of the characteristics of the products and external components, including transient characteri stics, as well as static characteristics. 2. you agree that application notes, re ference designs, and associated data and in formation contained in this document are presented only as guidance for products use. theref ore, in case you use such information, you are solely responsible for it and you must exercise your own independent verification and judgment in the use of such information contained in this document. rohm shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of such information. precaution for electrostatic this product is electrostatic sensitive product, which may be damaged due to electrostatic discharge. please take proper caution in your manufacturing process and storage so that voltage exceeding t he products maximum rating will not be applied to products. please take special care under dry condit ion (e.g. grounding of human body / equipment / solder iron, isolation from charged objects, se tting of ionizer, friction prevention and temperature / humidity control). precaution for storage / transportation 1. product performance and soldered connections may deteriora te if the products are stor ed in the places where: [a] the products are exposed to sea winds or corros ive gases, including cl2, h2s, nh3, so2, and no2 [b] the temperature or humidity exceeds those recommended by rohm [c] the products are exposed to di rect sunshine or condensation [d] the products are exposed to high electrostatic 2. even under rohm recommended storage c ondition, solderability of products out of recommended storage time period may be degraded. it is strongly recommended to confirm sol derability before using products of which storage time is exceeding the recommended storage time period. 3. store / transport cartons in the co rrect direction, which is indicated on a carton with a symbol. otherwise bent leads may occur due to excessive stress applied when dropping of a carton. 4. use products within the specified time after opening a humidity barrier bag. baking is required before using products of which storage time is exceeding the recommended storage time period. precaution for product label qr code printed on rohm products label is for rohms internal use only. precaution for disposition when disposing products please dispose them proper ly using an authorized industry waste company. precaution for foreign exchange and foreign trade act since our products might fall under cont rolled goods prescribed by the applicable foreign exchange and foreign trade act, please consult with rohm representative in case of export. precaution regarding intellectual property rights 1. all information and data including but not limited to application example contained in this document is for reference only. rohm does not warrant that foregoi ng information or data will not infringe any intellectual property rights or any other rights of any third party regarding such information or data. rohm shall not be in any way responsible or liable for infringement of any intellectual property rights or ot her damages arising from use of such information or data.: 2. no license, expressly or implied, is granted hereby under any intellectual property rights or other rights of rohm or any third parties with respect to the information contained in this document. other precaution 1. this document may not be reprinted or reproduced, in whol e or in part, without prior written consent of rohm. 2. the products may not be disassembled, converted, modified, reproduced or otherwise changed without prior written consent of rohm. 3. in no event shall you use in any wa y whatsoever the products and the related technical information contained in the products or this document for any military purposes, incl uding but not limited to, the development of mass-destruction weapons. 4. the proper names of companies or products described in this document are trademarks or registered trademarks of rohm, its affiliated companies or third parties. downloaded from: http:///
datasheet datasheet notice C we rev.001 ? 2014 rohm co., ltd. all rights reserved. general precaution 1. before you use our pro ducts, you are requested to care fully read this document and fully understand its contents. rohm shall n ot be in an y way responsible or liabl e for fa ilure, malfunction or acci dent arising from the use of a ny rohms products against warning, caution or note contained in this document. 2. all information contained in this docume nt is current as of the issuing date and subj ec t to change without any prior notice. before purchasing or using rohms products, please confirm the la test information with a rohm sale s representative. 3. the information contained in this doc ument is provi ded on an as is basis and rohm does not warrant that all information contained in this document is accurate an d/or error-free. rohm shall not be in an y way responsible or liable for an y damages, expenses or losses incurred b y you or third parties resulting from inaccur acy or errors of or concerning such information. downloaded from: http:///

▲Up To Search▲

Price & Availability of BR34E02NUX-3

	To Download BR34E02NUX-3 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .